The present invention relates to an integrated circuit (IC) process. More particularly, it relates to a mixed-mode process for IC fabrication.
With the increased complexity of semiconductor devices used in integrated circuits (ICs) has generated an increased demand for concurrent creation of active semiconductor devices such as field effect transistors (FETs) and capacitors that are in relatively close proximity to the active semiconductor devices. This mixing of active and passive devices is referred to as mixed-mode fabrication of semiconductor components.
Thus, the major classification of devices such as MOSFETs, capacitors and even conductive wires can be desirably and practically merged and manufactured on the same integrated circuit (IC) through a so-called mixed-mode fabrication process.
The mixed-mode process improves the production efficiency and performance of an IC product. Additionally, the number of required fabrication steps is reduced and cost savings can be realized by simultaneously forming different types of devices on the same IC.
In U.S. Pat. No. 5,918,119, Huang illustrates a mixed mode process for integrating MOSFET devices, comprising different gate insulator thicknesses, with a capacitor structure.
In addition, U.S. Pat. No. 6,586,299 to Tsai, teaches a mixed-mode process to simultaneously form a conductive wire, a MOS transistor and a capacitor structure with the least numbers of steps. However, neither of the referenced patents introduces the use of a hard mask layer during device formation and an additional photolithography step is necessary during the formation of the MOSFET device. Thus, a shortened mixed-mode process for IC manufacturing is required to improve the production efficiency.